论文标题
硅在III-V激光器中的热膨胀诱导脱位的缺陷过滤
Defect filtering for thermal expansion induced dislocations in III-V lasers on silicon
论文作者
论文摘要
用于硅光子学的外上综合III III-V半导体激光器具有显着转化信息网络的潜力,但是当前,即使在基于缺陷的INAS量子点(QD)激光器中,位错也限制了性能和可靠性。尽管低于临界厚度,但这些设备中的QD层包含以前无法解释的错误位错位,这有助于非辐射重组。我们在这里证明,由于(1)IIII-V层和硅之间的热膨胀不匹配,在生长后冷却期间形成了这些不合适的位错,以及(2)活性区域的沉淀和合金硬化。通过结合额外的亚临界厚度,合用的不合适置换夹层,我们利用这些机械硬化效应来提高我们的优势,成功地将95%的不合适位错位于模型结构中的QD层。与常规的脱位缓解策略不同,诱捕层既不会减少螺纹位错的数量也不减少不合适的位错数。它只是将失调位错的位置从QD层转移,从而减少了缺陷对发光的影响。在完整的激光器中,在QD主动区域上方和下方添加一个不合适的脱位诱捕层可导致失位错位并大大提高性能:我们测量激光阈值电流的降低双重降低,输出功率增加了三倍。我们的结果表明,采用传统螺纹脱位降低技术和优化的错误脱位诱捕层的设备最终可能导致完全集成,商业上可行的基于硅的光子集成电路。
Epitaxially integrated III-V semiconductor lasers for silicon photonics have the potential to dramatically transform information networks, but currently, dislocations limit performance and reliability even in defect tolerant InAs quantum dot (QD) based lasers. Despite being below critical thickness, QD layers in these devices contain previously unexplained misfit dislocations, which facilitate non-radiative recombination. We demonstrate here that these misfit dislocations form during post-growth cooldown due to the combined effects of (1) thermal-expansion mismatch between the III-V layers and silicon and (2) precipitate and alloy hardening in the active region. By incorporating an additional sub-critical thickness, indium-alloyed misfit dislocation trapping layer, we leverage these mechanical hardening effects to our advantage, successfully displacing 95% of misfit dislocations from the QD layer in model structures. Unlike conventional dislocation mitigation strategies, the trapping layer reduces neither the number of threading dislocations nor the number of misfit dislocations. It simply shifts the position of misfit dislocations away from the QD layer, reducing the defects' impact on luminescence. In full lasers, adding a misfit dislocation trapping layer both above and below the QD active region displaces misfit dislocations and substantially improves performance: we measure a twofold reduction in lasing threshold currents and a greater than threefold increase in output power. Our results suggest that devices employing both traditional threading dislocation reduction techniques and optimized misfit dislocation trapping layers may finally lead to fully integrated, commercially viable silicon-based photonic integrated circuits.