论文标题
具有动态电压和频率缩放的嵌入式GPU中的运行时功率建模
Run-Time Power Modelling in Embedded GPUs with Dynamic Voltage and Frequency Scaling
论文作者
论文摘要
本文研究了一种强大的基于CPU的功率建模方法，该方法对从性能计数器到嵌入式GPU衍生的解释事件进行自动搜索。 64位TEGRA TX1 SOC配置了启用DVF，并使用多个CUDA基准测试用于针对每个频率和电压点进行优化的训练和测试模型。然后将这些优化的模型与更简单的统一模型进行了比较，该模型使用一组模型系数用于所有频率和电压点。为了获得此统一模型，进行了许多实验，以提取有关怠速，时钟和静态功率的信息，以从单个参考方程中得出功率使用。结果表明，统一模型具有竞争精度，平均5 \％误差，其中有四个解释性变量在测试数据集上，并且能够正确预测电压，频率和温度对功耗的影响。当由于硬件限制或模拟平台中的最坏情况分析而无法获得时，该模型可用于替换直接电源测量。
This paper investigates the application of a robust CPU-based power modelling methodology that performs an automatic search of explanatory events derived from performance counters to embedded GPUs. A 64-bit Tegra TX1 SoC is configured with DVFS enabled and multiple CUDA benchmarks are used to train and test models optimized for each frequency and voltage point. These optimized models are then compared with a simpler unified model that uses a single set of model coefficients for all frequency and voltage points of interest. To obtain this unified model, a number of experiments are conducted to extract information on idle, clock and static power to derive power usage from a single reference equation. The results show that the unified model offers competitive accuracy with an average 5\% error with four explanatory variables on the test data set and it is capable to correctly predict the impact of voltage, frequency and temperature on power consumption. This model could be used to replace direct power measurements when these are not available due to hardware limitations or worst-case analysis in emulation platforms.
