论文标题
拓扑电路模拟中的二阶拓扑绝缘子和易碎拓扑
Second-order topological insulator and fragile topology in topological circuitry simulation
论文作者
论文摘要
二阶拓扑绝缘子（SOTIS）是在边缘交点处表现出（D-2）维度局部模式的d维度中物质的拓扑阶段。我们表明，SOTI可以通过堆叠的Chern绝缘子，其通过层间耦合连接的相反的手性设计。为了表征散装的角度的对应关系，我们建立了雅各布转换的嵌套威尔逊环路方法和一个适用于更广泛类别的高阶拓扑系统的边缘理论。相应的拓扑不变允许填充分数电荷的角模式的异常。该系统表现出一个脆弱的拓扑阶段，其特征是威尔逊环频谱中缺少散布隙。此外，我们认为建议的方法可以推广到多层。我们的工作提供了探索和理解高阶拓扑现象的观点。
Second-order topological insulators (SOTIs) are the topological phases of matter in d dimensions that manifest (d-2)-dimensional localized modes at the intersection of the edges. We show that SOTIs can be designed via stacked Chern insulators with opposite chiralities connected by interlayer coupling. To characterize the bulk-corner correspondence, we establish a Jacobian-transformed nested Wilson loop method and an edge theory that are applicable to a wider class of higher-order topological systems. The corresponding topological invariant admits a filling anomaly of the corner modes with fractional charges. The system manifests a fragile topological phase characterized by the absence of a Wannier gap in the Wilson loop spectrum. Furthermore, we argue that the proposed approach can be generalized to multilayers. Our work offers perspectives for exploring and understanding higher-order topological phenomena.
