论文标题
TimePix4前端的时机性能
Timing performance of the Timepix4 front-end
论文作者
论文摘要
提出了对定时性能的timepix4像素前端的表征。外部生成的测试脉冲用于探测每像素时间到数字转换器（TDC），并通过精确控制10 ps的步骤来测量时间池大小。结果表明，如果执行校准以补偿像素TDC的电压控制振荡器的频率变化，则TDC可以达到60 ps的时间分辨率。 TimePix4的内部时钟分布系统用于控制内部生成的模拟测试脉冲的到达时间，约为20 ps。模拟测试脉冲机制将受控量的电荷直接注入像素的模拟前端（AFE），并用于测量时间分辨率作为信号电荷的函数，与TDC无关。结果表明，对于默认配置，孔收集模式下的AFE时间分辨率限制为105 PS。但是，通过以增加功率耗散成本增加前置放大器偏置，可以将其提高到60 ps。对于电子收集模式，以21 ke的信号电荷为裸机设备测量了47 ps的AFE时间分辨率。据观察，键入传感器的额外输入电容可将该数字降低到62 ps。
A characterisation of the Timepix4 pixel front-end with a strong focus on timing performance is presented. Externally generated test pulses were used to probe the per-pixel time-to-digital converter (TDC) and measure the time-bin sizes by precisely controlling the test-pulse arrival time in steps of 10 ps. The results indicate that the TDC can achieve a time resolution of 60 ps, provided that a calibration is performed to compensate for frequency variation in the voltage controlled oscillators of the pixel TDCs. The internal clock distribution system of Timepix4 was used to control the arrival time of internally generated analog test pulses in steps of about 20 ps. The analog test pulse mechanism injects a controlled amount of charge directly into the analog front-end (AFE) of the pixel, and was used to measure the time resolution as a function of signal charge, independently of the TDC. It was shown that for the default configuration, the AFE time resolution in the hole-collecting mode is limited to 105 ps. However, this can be improved up to about 60 ps by increasing the preamplifier bias-current at the cost of increased power dissipation. For the electron-collecting mode, an AFE time resolution of 47 ps was measured for a bare Timepix4 device at a signal charge of 21 ke. It was observed that additional input capacitance from a bonded sensor reduces this figure to 62 ps.
