论文标题

使用错误放大的任意角度单量门门的驱动器非线性校准

Calibration of Drive Non-Linearity for Arbitrary-Angle Single-Qubit Gates Using Error Amplification

论文作者

Lazăr, Stefania, Ficheux, Quentin, Herrmann, Johannes, Remm, Ants, Lacroix, Nathan, Hellings, Christoph, Swiadek, Francois, Zanuz, Dante Colao, Norris, Graham J., Panah, Mohsen Bahrami, Flasby, Alexander, Kerschbaum, Michael, Besse, Jean-Claude, Eichler, Christopher, Wallraff, Andreas

论文摘要

执行高保真操作的能力对于将量子设备扩展到大量量子位至关重要。但是,源自控制线中非线性组件的信号失真可以限制单量门门的性能。在这项工作中,我们使用基于误差扩增的测量值来表征和纠正源自量子驱动率的非线性缩放的小单量旋转误差,并以编程脉冲的幅度振幅。借助我们的硬件和15 ns的脉冲,旋转角度偏离了线性模型多达几个度。使用Purity基准测试,我们发现控制错误达到$ 2 \ times 10^{ - 4} $,该错误占总门错误的一半。使用跨凝回基准测试,我们演示了任意角度的单量门门,其连贯限制的错误为$ 2 \ times 10^{ - 4} $,泄漏以下$ 6 \ times 10^{ - 5} $。尽管这些错误的确切幅度特定于我们的设置,但提出的方法适用于任何非线性来源。我们的工作表明,Qubit驱动线成分的非线性限制了单量门门的忠诚度,而与不校正时相干时间,电路设计或泄漏缓解的改进无关。

The ability to execute high-fidelity operations is crucial to scaling up quantum devices to large numbers of qubits. However, signal distortions originating from non-linear components in the control lines can limit the performance of single-qubit gates. In this work, we use a measurement based on error amplification to characterize and correct the small single-qubit rotation errors originating from the non-linear scaling of the qubit drive rate with the amplitude of the programmed pulse. With our hardware, and for a 15-ns pulse, the rotation angles deviate by up to several degrees from a linear model. Using purity benchmarking, we find that control errors reach $2\times 10^{-4}$, which accounts for half of the total gate error. Using cross-entropy benchmarking, we demonstrate arbitrary-angle single-qubit gates with coherence-limited errors of $2\times 10^{-4}$ and leakage below $6\times 10^{-5}$. While the exact magnitude of these errors is specific to our setup, the presented method is applicable to any source of non-linearity. Our work shows that the non-linearity of qubit drive line components imposes a limit on the fidelity of single-qubit gates, independent of improvements in coherence times, circuit design, or leakage mitigation when not corrected for.

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